A high-voltage semiconductor device used for, e.g., an LCD driver IC (LDI), a PDP driver IC, a flash memory, or EEPROM, needs to have high junction breakdown voltage. To this end, the high-voltage semiconductor device may be formed in a deep well with low doping distribution.
The well used for the high-voltage semiconductor device may be formed as a diffused well that uses well drive-in by high energy ion implantation and high-temperature, long-duration thermal treatment.
Recently, in order to obtain a high net number of dies with a small chip in a wafer, the size of a device has been gradually decreasing from 0.25 μm to 0.18 μm, and then to 0.13 μm and 0.11 μm. Thus, an important goal is to maintain the same performance while simultaneously reducing the size of the device. In addition, an analog output property is required that is compatible with a low-voltage process and enables excellent driving of a display panel.
FIGS. 1A and 1B are views of depths of such high-voltage diffused wells according to open areas of the diffused wells. Referring to FIG. 1A, as the open area widens, a depth of a well through ion implantation also increases and then remains at a constant level. Referring to FIG. 1B, in the process of manufacturing a semiconductor device, as the open area widens, a device is generally manufactured with an area corresponding to an increased depth level of the diffused well.
FIGS. 2A to 2D are cross-sectional views of general processes for forming wells of a semiconductor device according to a related art.
Referring to FIG. 2A, a nitride film 102 is disposed on a P-doped substrate 100. A photoresist pattern (not shown) is formed on the nitride film 102, and the nitride film 102 is etched by using the photoresist pattern. Subsequently, the nitride film 102 implants N-type ions into an open area to form a deep N well 105, and the photoresist pattern is removed.
Referring to FIG. 2B, an oxide film 110 is formed on a deep N well 105, and the remaining nitride film 102 is removed. Subsequently, P-type ions are implanted on both sides of the oxide film 110 by using the oxide film 110 as a hard mask to form a deep P well 107. Referring to FIG. 2C, if well-drive-in is performed on the deep N well 105 and the deep P well 107 through a long annealing process, a diffused well of a semiconductor is formed.
However, referring to FIG. 2D, after forming the deep N well 105 and the deep P well 107, a process of forming a photoresist pattern on the wells must be performed to form a different conductivity type of another well in the N and P wells as shown. Thus, there are limitations, in that processes become complex and the manufacturing cost increases due to usage of a further mask.